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Published May 2000 | Version public
Book Section - Chapter Metadata-only

Design of a novel low-power 4th-order 1.7 GHz CMOS frequency synthesizer for DCS-1800

Creators

  • 1. ROR icon Johannes Kepler University of Linz

Abstract

A low-power fully-integrated type-2 4th-order 1.7 GHz CMOS frequency synthesizer for DCS-1800 application is designed and simulated in a 0.25 μm process technology. The frequency switching is achieved using a novel architecture exploiting a direct digital synthesis (DDS) device as the frequency reference. The new topology significantly lowers the undesired sideband power due to divider ratio switching by directly shifting the frequency of the DDS reference. The frequency synthesizer (excluding the DDS device) dissipates only 9 mW of power from a 2 V power supply. It employs a fast-switching novel charge pump circuit and a low-noise fully-integrated differential LC voltage controlled oscillator using on-chip spiral inductors and accumulation-mode capacitors to meet the requirements of a DCS-1800 system. A detailed analysis of the phase noise in the 4th order loop is presented.

Additional Information

© 2000 IEEE. Date of Current Version: 06 August 2002. The authors would like to thank California Institute of Technology where this work was done for support during completion of this project.

Additional details

Identifiers

Eprint ID
28258
Resolver ID
CaltechAUTHORS:20111130-143135860

Dates

Created
2012-01-19
Created from EPrint's datestamp field
Updated
2021-11-09
Created from EPrint's last_modified field

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6777234