Published 1994 | Version Published
Book Section - Chapter Open

A Learning Analog Neural Network Chip with Continuous-Time Recurrent Dynamics

Abstract

We present experimental results on supervised learning of dynamical features in an analog VLSI neural network chip. The recurrent network, containing six continuous-time analog neurons and 42 free parameters (connection strengths and thresholds), is trained to generate time-varying outputs approximating given periodic signals presented to the network. The chip implements a stochastic perturbative algorithm, which observes the error gradient along random directions in the parameter space for error-descent learning. In addition to the integrated learning functions and the generation of pseudo-random perturbations, the chip provides for teacher forcing and long-term storage of the volatile parameters. The network learns a 1 kHz circular trajectory in 100 sec. The chip occupies 2mm x 2mm in a 2μm CMOS process, and dissipates 1.2 m W.

Additional Information

© 1994 Morgan Kaufmann. Fabrication of the CMOS chip was provided through the DARPA/NSF MOSIS service. Financial support by the NIPS Foundation largely covered the expenses of attending the conference.

Attached Files

Published - 778-a-learning-analog-neural-network-chip-with-continuous-time-recurrent-dynamics.pdf

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778-a-learning-analog-neural-network-chip-with-continuous-time-recurrent-dynamics.pdf

Additional details

Identifiers

Eprint ID
55570
Resolver ID
CaltechAUTHORS:20150305-163505478

Funding

NIPS Foundation

Dates

Created
2015-03-06
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Updated
2019-10-03
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