Published May 22, 1990
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Spatial Light Modulators As Parallel Memories For Optoelectronic Neural Networks
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1.
California Institute of Technology
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Abstract
A generic architecture for realizing neural networks is presented in which the synaptic interaction matrix is loaded in parallel into an electronic integrated circuit from a SLM. Three types of the electronic processors are described using CCD, CID and CMOS technologies respectively. The pros and cons of currently existing SLMs for this architecture are pointed out.
Additional Information
© 1990 Society of Photo-Optical Instrumentation Engineers (SPIE). This research was supported by the Defense Advanced Research Projects Agency and the Air Force Office of Scientific Research.Attached Files
Published - 177.pdf
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177.pdf
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Identifiers
- Eprint ID
- 87732
- Resolver ID
- CaltechAUTHORS:20180710-152459167
Funding
- Defense Advanced Research Projects Agency (DARPA)
- Air Force Office of Scientific Research (AFOSR)
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- Created
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2018-07-10Created from EPrint's datestamp field
- Updated
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2021-11-15Created from EPrint's last_modified field
Caltech Custom Metadata
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- Proceedings of SPIE
- Series Volume or Issue Number
- 1150