CaltechAUTHORS
Published November 2, 2010 | Version Supplemental Material
Journal Article Open

Batch Fabrication of High-Performance Planar Patch-Clamp Devices in Quartz

Creators

  • 1. ROR icon California Institute of Technology
  • 2. ROR icon The University of Texas at Austin
  • 3. ROR icon Carnegie Mellon University
  • 4. ROR icon University of Southern California

Abstract

The success of the patch-clamp technique has driven an effort to create wafer-based patch-clamp platforms. We develop a lithographic/electrochemical processing scheme that generates ultrasmooth, high aspect ratio pores in quartz. These devices achieve gigaohm seals in nearly 80% of trials, with the majority exhibiting seal resistances from 20-80 GΩ, competing with pipette-based patch-clamp measurements.

Additional Information

© 2010 Wiley. Received: May 14, 2010. Published online: September 9, 2010. This work was funded by the National Cancer Institute grant no. 5U54 CA119347 (J.R.H., P.I.) and by the Institute for Collaborative Biotechnologies through grant DAAD19-03-D-0004 from the US Army Research Office. We thank Rigo Pantoja, Kate Klemic, Jan Behrends, and Fred Sachs for very useful advice and Habib Ahmad for contributions in creating figures in this manuscript. We also thank the UCLA Nanoelectronics Research Facility staff, especially Tom Lee and Joe Zendejas, for their support in device fabrication.

Attached Files

Supplemental Material - adma_201001793_sm_suppl.pdf

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adma_201001793_sm_suppl.pdf

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Additional details

Identifiers

Eprint ID
22808
Resolver ID
CaltechAUTHORS:20110310-100121704

Funding

National Cancer Institute
5U54 CA119347
Army Research Office (ARO)
DAAD19-03-D-0004

Dates

Created
2011-03-11
Created from EPrint's datestamp field
Updated
2021-11-09
Created from EPrint's last_modified field