CaltechAUTHORS
Published May 2015 | Version public
Book Section - Chapter Metadata-only

An MMIC low-noise amplifier design technique

Creators

  • 1. ROR icon Jet Propulsion Lab
  • 2. ROR icon Aalto University
  • 3. ROR icon California Institute of Technology
  • 4. ROR icon Northrop Grumman (United States)

Abstract

In this paper we propose a parallel two-finger unit transistor MMIC low-noise amplifier design technique which enables the design of wideband and high linearity low-noise amplifiers with very stable, predictable, and repeatable operation. We prove the feasibility of the proposed design technique by demonstrating a three-stage LNA packaged in a WR10 waveguide housing and fabricated using a 35-nm InP HEMT technology that achieves more than a 20-dB gain from 75 to 116 GHz and 26–33-K noise temperature from 85 to 116 GHz when cryogenically cooled to 27 K.

Additional Information

© 2015 IEEE. The authors thank Ms. Mary Soria and Ms. Heather Owen of JPL for assembly expertise. This work was supported in part by the Jet Propulsion Laboratory, California Institute of Technology, under a contract with the National Aeronautics and Space Administration. The work of M. Varonen was supported by the Academy of Finland through the Postdoctoral research post and by Alfred Kordel Foundation.

Additional details

Identifiers

Eprint ID
59190
DOI
10.1109/MWSYM.2015.7166997
Resolver ID
CaltechAUTHORS:20150804-133433118

Related works

Describes
10.1109/MWSYM.2015.7166997 (DOI)
http://resolver.caltech.edu/CaltechAUTHORS:20160418-114813436 (URL)

Funding

NASA/JPL/Caltech
Academy of Finland
Alfred Kordel Foundation

Dates

Created
2015-08-05
Created from EPrint's datestamp field
Updated
2021-11-10
Created from EPrint's last_modified field

Caltech Custom Metadata

Caltech groups
Physics Department