Test stand for the Silicon Vertex Detector of the Collider Detector Facility
Creators
Abstract
A test stand for the next generation of the Silicon Vertex Detector (SVX-II) of the Collider Detector Facility (CDF) at Fermilab has been developed. It is capable of performing cosmic ray, beam, and laser pulsing tests on silicon strip detectors using the new generation of SVX chips. The test stand is composed of a SGI workstation, a VME CPU, the Silicon Test Acquisition and Readout (STAR) board, the Test Fiber Interface Board (TFIB), and the Test Port Card (TPC). The STAR mediates between external stimuli for the different tests and produces appropriate high level commands which are sent to the TFIB. The TFIB, in conjunction with the TPC, translates these commands into the correct logic levels to control the SVX chips. The four modes of operation of the SVX chips are configuration, data acquisition, digitization, and data readout. The data read out from the SVX chips is transferred to the STAR. The STAR can then be accessed by the VME CPU and the SGI workstation for future analyses. The detailed description of this test stand will be given.
Additional Information
© 1996 IEEE.Attached Files
Published - 00506658.pdf
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00506658.pdf
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- Eprint ID
- 91711
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- CaltechAUTHORS:20181212-103952697
Dates
- Created
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2018-12-12Created from EPrint's datestamp field
- Updated
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2021-11-16Created from EPrint's last_modified field
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