Published November 19, 2012 | Version Supplemental Material
Journal Article Open

Silicon Nanowire Charge-Trap Memory Incorporating Self-Assembled Iron Oxide Quantum Dots

  • 1. ROR icon California Institute of Technology
  • 2. ROR icon Micron (United States)

Abstract

Charge-trap non-volatile memory devices based upon the precise integration of quantum dot storage elements with silicon nanowire field-effect transistors are described. Template-assisted assembly yields an ordered array of FeO QDs within the trenches that separate highly aligned SiNWs, and injected charges are reversibly stored via Fowler–Nordheim tunneling into the QDs. Stored charges shift the transistor threshold voltages, providing the basis for a memory device. Quantum dot size is found to strongly influence memory performance metrics.

Additional Information

© 2012 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim. Received: May 1, 2012. Published online: September 10, 2012. This work was funded by the Department of Energy, Basic Energy Sciences (DE-FG03-01ER46175). The authors acknowledge Dr. Jen-Kan Yu and Dr. Douglas Tham for assistance with device characterization.

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Identifiers

Eprint ID
35972
Resolver ID
CaltechAUTHORS:20121213-093659505

Funding

Department of Energy (DOE)
DE-FG03-01ER46175

Dates

Created
2012-12-17
Created from EPrint's datestamp field
Updated
2021-11-09
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